1. Field of the Invention
The invention relates in general to a semiconductor structure, and more particularly to a semiconductor structure with reduced resonance effect and a manufacturing method thereof.
2. Description of the Related Art
As the circuit design is directed towards higher frequencies, the integrity of signals becomes more and more important. For example, two parallel electrical boards can be regarded as a capacitor under the state of direct current (DC), and which can be regarded as a wave guide in the filed of high frequency micro-wave. A wave guide is similar to a resonance cavity. When resonance frequency occurs, the parallel electrical boards transmits the electromagnetic wave of such resonance frequency. In other words, when resonance frequency occurs, part of the to-be-transmitted signal will be transmitted to the parallel electrical boards. Such phenomenon is undesirable during signal transmission, for part of the energy of signal being lost on the parallel electrical boards. Consequently, the energy transmitted from the signal transmission end will not be completely received at the signal reception end, hence resulting in inferior signal quality. From another aspect, if a high frequency noise between the parallel electrical boards should match with the resonance frequency between the parallel electrical boards, such noise will be coupled to the transmission line via the parallel electrical boards. Therefore, the quality of signal transmission is severely affected.
Normally, in a semiconductor structure, the backflow path can be increased by utilizing bypass vias so as to reduce the resonance and coupling effect between parallel electrical boards (such as power layer/ground layer). Particularly, the strip lines in a semiconductor structure are most likely to be affected by the resonance effect between the parallel electrical boards. Therefore, many methods for reducing the resonance effect on the strip lines have been developed in prior art.
Referring to FIG. 1, a structure of several vias disposed along two sides of a strip line is illustrated. As indicated in FIG. 1, to improve the integrity of signal transmission, two rows of vias 12 are disposed beside the strip line 10 in a conventional semiconductor structure, which is the most commonly used method to reduce resonance effect and insertion loss. With the disposition of two rows of vias 12, parallel electrical boards of the same attribution are short-circuited, not only effectively providing a backflow path, but also generating shielding effect to protect the strip line 10 from being affected by the resonance between parallel electrical boards.
However, the above-mentioned method is not a perfect solution for resolving the resonance effect in practice. The strip line 10 is so greatly affected by the resonance between parallel electrical boards that the effect of resonance cannot be completely immunized, even with the two rows of vias 12 beside the strip line 10. Moreover, to reduce resonance effect by way of disposing two rows of vias 12 beside the strip line 10 requires a large number of vias 12 and thus incurs considerable costs. Further, the manner of disposing two rows of vias 12 still remains a certain amount of insertion loss between the parallel electrical boards at a particular frequency, and the resonance effect cannot be resolved effectively. Therefore, how to resolve the problems of resonance effect and insertion loss without incurring too much cost has become an important topic in the development of semiconductor structure.